HARDWARE-ENFORCED PHYSICAL-STATE-TRANSITION PRIVILEGE
ARCHITECTURE FOR PHYSICAL ARTIFICIAL INTELLIGENCE

A physical artificial intelligence computing architecture controls
execution of artificial intelligence-generated physical state transitions as
privileged machine operations. An artificial intelligence compute domain
generates a canonical physical-action descriptor representing a proposed
transition of a physical state of a machine while lacking an alternate direct
hardware path for causing the transition. A protected physical-execution
control domain establishes a physical-operation capability that binds the
proposed transition to a pre-execution physical-state version, one or more
authorized physical endpoints, a physical execution envelope, a validity
condition, and an execution-use state. A hardware enforcement circuit
positioned in a physical input/output path verifies actuator-directed
transactions against the capability and current physical state before
permitting the transactions to reach actuator-control resources. Acceptance
of a transaction advances, attenuates, or consumes the execution-use state. A
physical-state update, execution-state transition, expiration, or revocation
may invalidate or suspend remaining authority. Implementations include
physical actuation management units, protected capability registers,
restricted physical-action instruction sets, secure command queues, protected

interconnects, systems-on-chip, chiplets, programmable logic, and actuator-
local enforcement circuits.